KWZ2000 Preface

A few words of background as to how this project came to be may be helpful in understanding.

In the late 20th Century, I started to design a transistorized kilowatt amplifier for SSB using the (July 1952) Kahn envelope restoration scheme. I ran into two obstacles: the widely varying drive levels which needed to be accomodated and the group delay introduced by the re-modulator signal chain.

I did craft a scheme for dealing with the delay but, I couldn't find a good solution with transistors for the first problem so, I started building a tube (which could tolerate severe overdrive on the grid) amplifier of similar concept.

Then, one day, it dawned on me that compared to the complexity of the amplifier a complete SSB exciter would be little more work and have far better performance than adding an amplifier to a typical SSB transceiver.

When I saw the AD9856 chip, it seemed obvious to construct the exciter digitally and that's how it started. The receiver was an afterthought since it just takes "a few" more parts to include. It does complicate the control (PIC) software as there are far more functions in a receiver than a transmitter.

KWZ2000 Overview

A kilowatt transistor SSB/FM/AM/CW/etc. transceiver for 160 through 6 meters with excitation capability for 144, 220, and 440 MHz. The transmit chain consists of:

1. A Mike preamp connected to a 24 Bit Analog to Digital converter running at a 24 KHz sample rate (Crystal CS5341) with serial data output. This A/D converter provides enough dynamic range to obsolete a "standard" mike gain control before digitization. A Digital Voice Recorder (DVR) may also be placed at this point in the signal chain.

2. A 16 Bit Digital Signal Processor chip (Blackfin) good for about 500 mips. This chip can perform a Smart VOX function (no missed syllables) by delaying the input signal 10 mS. The same buffer can be used to implement a Hilbert transform compressor (similar in function to RF clipping). Transmit bandwidth will be set by mode... or whim.

The transmit section uses one serial port to input the microphone signal at 24KHz. In receive mode, this portion of the transmit software will remain active so that the input delay may be employed to implement the Smart VOX function.

SSB will be generated by the Weaver (third) method and the resulting I&Q signals will be up sampled by a factor of 32. A power envelope function (I^2+Q^2) will be calculated at a 195 KHz rate and delayed to match the upconversion delay. This digital representation of the SSB envelope will be loaded directly into the modulator via an SPI port at a 195 KHz rate. (part 5 below)

For CW, this critter will also be able to create a variety of envelope shapes... from textbook perfect to simulated chirps and clicks. :-)

FM is created directly by adding the digitized value of the mike audio, 16 bits - up sampled to 192 KHz, scaled for the desired deviation, to the nominal carrier setting (32 bits) and updating the DDS registers with those results (also at a 192 KHz rate). This method gives perfect FM with ridiculous control over the deviation: 1 LSB = .075 Hz @ 5 KHz total deviation. A 2nd SPI port transfers this data to the upconverter.

AM is made in the old way, by directly modulating the final amp.

And of course PSK, FSK, QAM and almost any other imaginable digital mode will be doable.

3. A combination up-sampler, Direct Digital Synthesizer and I&Q modulator (a single IC -- AD9857) that can directly output on frequency up through 6 meters. SSB is created by completing the Weaver modulation with the second mix directly at the output frequency. Strays and spurs are down about 85 dB according to this part's data sheet.

4. A (switchable) limiting amp (to make Class D) followed by a one watt stage (Motorola CA2832) which may operate either Class AB for barefoot operation/test or Class D for HF. Images of the DDS modulator IC may be selectively filtered and amplified by another Class AB stage to use this portion as an exciter for (144/220/440) VHF with a slight reduction in signal specifications.

5. A legal limit Class D amp modulated by a switching amplifier powered by a power factor corrected (PFC) input circuit. Output filtering and tuning will be by means of a series trap followed by a double PI-net transforming the 50 ohm amp to 1000 ohms then back to the antenna impedance. An independent SWR protection circuit will directly reduce the voltage to the finals, to prevent awful things from happening should something screw up in the software.

The modulator, consisting of a power FET in series with the RF finals controlled by a 16 bit D/A operating at 195KHz with its input delayed to match the RF signal chain as noted previously above, will implement envelope restoration for SSB, envelope shaping for CW, direct modulation for AM and power control for FM, CW, & SSB. At low levels (less than 10% power) the driving stage will also be modulated.

The RF amplifier and modulator stages can be line isolated by means of RF transformers, plus optoisolators for the control signals, so no big AC power transformer will be required. A 2KW PFC input stage will allow for up to 3.2 KW peak power final amp input. A (1MHz) PWM stage will supply just enough voltage to allow for a bit of modulator headroom -- I believe this is called Class H operation in some circles.

A local (PIC 16C7X) microprocessor will implement the autotuning functions.

This section will be package in a separate enclosure and connected via RS-232, RF cables & a high speed serial link to the exciter.

6. An 8 bit (PIC 16C6X) microprocessor to handle the mode selection via a 16 button keypad, tuning, etc. via 4 knobs and driving a Vacuum Fluorescent readout for all the words & numbers.

Finally, a 24.576 MHz master clock multiplied (by 8) to 196,608 MHz to clock the DDS, multiplied and divided as necessary to run everything else. For narrowband VHF, use a TCXO would be preferable in this spot.

The receiver chain consists of:

1. A Diode/Varactor Tuned preselector with an ancillary noise generator for alignment.

A 20dB RF preamplifier utilizing a low distortion high IMD Hybrid (Motorola).

2. A Synchronous Sampling I/Q detector (aka Tayloe Mixer) in a fully balanced configuration driven by a 4 phase clock. This clock may be generated by a pair of (AD9952) DDS's run at 55 MHz (max) in quadrature.

An impulse noise detector operating with a 40 Mhz bandpass filter may directly inhibit the RF sampling gates preventing spreading of a noise impulse in the detector or following filters.

3. A 24 bit Sigma Delta A/D converter (CS5397) driven by a variable speed clock to enable the use of the A/D's digital anti-alias filters as bandpass filters. A 1.5KHz - 24 KHz sample rate implements 650Hz-10KHz wide front end filters.

4. The same 16 Bit Digital Signal Processor chip (Blackfin) as used in the transmit chain. The receive section uses the second serial port to input the I/Q data at the variable rate defined above and output at the same rate to the audio output DAC.

This stage will truncate the 24 bit signal from the A/D converter to 16 significant bits noting the level (6 dB per binary place) for the S meter. After final bandpass filtering, SSB demodulation by the Weaver (Third) method, AM envelope detection, or FM detection may be performed. De-noising, notch filtering, final bandpass filtering, squelch, etc. of the detected signal may also be implemented in the DSP.

The dynamic range of the A/D converter will allow for almost all digital AGC except for the very high end of the range when the RF pre-amp will be bypassed. 30 dB (or so) of hysteresis will prevent "hunting".

5. A (24KHz) 16 bit Sigma Delta D/A converter (Crystal CS4330) driving a low distortion audio power amp will complete the chain. The Sigma Delta topology allows direct conversion of the low sample rate signals used for the narrow front end bandwidths without special post conversion filtering.

KWZ2000 Status 2005

This contraption is currently under (slow) contruction. I have all of the components for the exciter section which will be packaged in an old Hewlett Packard series 2 test equipment cabinet and most of the parts for the final amplifer which will be assembed in an old Hewlett Packard oscilloscope cabinet.

I'll be updating this page as time and progress permits.

Transmitter Receiver Control Power Amplifier Power Supply DSP Overview